2GHz Dothan (X60 C2D, X31 1.7 Banias), 2GB RAM, 320GB HDD, DVD Multi-Burner, IBM 11b/g, Bluetooth II, Docks
multi-boot (98SE, W2K, XP PRO, Win7, Linux Mint 10)
X61 7673-V2V, T60 2007-QPG, T42 2373-F7G, X32 (IPS Screen), A31p w/ Ultrabay Numpad, A21m 2628-GXU
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Current stable: 770Z, 600X, T23, R40, R52, T43p, X41, R60, T60, T61, X61, X61T, X201T, T420; T400 (2768-EK9); W510 (4391-CTO), X220T (4296-2W5), T440 (20B6-00AUS), plus an Intellistation M 6219.
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A 2700 will work in a 2100 (and a 3200).
They will run at the speed as defined by the onboard-chipset.
So a 2700 will work at 2100 in a 2100 machine, etc.
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T420s · i5-2520M · 12GB RAM · 480GB SSD · HD+ · HD3000 · F5521gw
T60 · T2500 · 3GB RAM · 128GB SSD · 14.1 SXGA+ · 128MB ATI X1400
Past: T400, T41, T22, 600X, 390X
In short: Are you using 2 different brands/models of DDR modules?
Past Personal and Serviced: 240, 570, 600E, A20m, T20, T21, 3x T30, 12xT4x, T43p (I miss it! ), X20, X24
Current Workbench: X40, 2xX41, 2xT40, 3xT42, 5xiSeries,9x600/E/X
CAS latency change is not related to drop in bandwidth but the time to get data from storage node to the output buffer doesn't change so much. So at faster (shorter) clock cycles, the RAM needed more clock cycles to get the data to the output buffer. They all need roughly about 12-15 nSec from CAS (column address available) to data on the output buffer. Basically the RAM has to decode the column address, activate the column driver, sense the storage node, drive the output high or low within this period of time. Speed only get faster when the process design rule get smaller or working voltage get lower (such as DDR2, DDR3).
The computer operates at JEDEC standard timing or what the SPD data tells it. If you have two modules of different speed, the data may disappear from the RAM output buffer in one module faster than the computer expects it. This is called not enough HOLD time. If the RAM couldn't get the data there by the time the computer expects it, this is called not enough SETUP time.
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