ASIC Designers? VERILOG

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ennma
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ASIC Designers? VERILOG

#1 Post by ennma » Fri May 18, 2007 12:48 pm

Hello,
any of you a ASIC designer, who is fluent in VERILOG I am just
strating , seemse pretty cool, but I need a manual for Synopys

VCS running in linux.

any one can point me the way?

thanks

ennma
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gator
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#2 Post by gator » Fri May 18, 2007 1:36 pm

I am not a Verilog guy, but I used a book by J. Bhasker from bell labs when I was in my undergrad. It is a great book to have with if you are gonna be working in Verilog, check it out.
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ennma
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#3 Post by ennma » Fri May 18, 2007 2:22 pm

well there are many resources for the language construct but
not many for the simulator that I am using ,VCS,
Also my traing was in Singnal Processing which is somewhat odd
but hey what ever I am excited learning new material.

thanks
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t20user
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#4 Post by t20user » Wed May 23, 2007 2:16 pm

I have not written in VERILOG since college. I have been using VHDL since I graduated. I was once told that Verilog was preferred on the West Coast and VHDL on the East. I know for a fact defense contractors prefer VHDL.

Anyway, not sure where to get the Synopsis docs, I would assume they are available online, maybe not.

ennma
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#5 Post by ennma » Wed May 23, 2007 11:47 pm

yeah I am in the west Coast Cisco, Verilog is popular here.
I have never ever touched hardware design, so it is a steep
learning curve for me, but I have alot of resources not alot of time

Thanks for the feed back
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