600E CMOS override for memory sizing?

[wjcroft]

I am using two 256MB memory sticks in this 600E, Crucial/Micron 100MHz, CL2. They are both the same part#, MT16LSDF3264HG-10EE4. Sometimes it does not see the second RAM on powerup, sometimes it does. In either case my OS runs fine (Ubuntu Feisty), have never had any problems or memory errors.

Here is the weird part. If it is NOT seeing both RAMs, I can "solve" the problem by simply removing them from the machine, reinserting, and powering on. Every time I power on after a physical insert it always sees both sticks. But a subsequent power cycle will frequently not pickup the 2nd RAM.

I've tried everything I can think of, cleaning the contacts with an eraser, switching the RAMs in their sockets, etc. I don't actually think it is an issue with these RAMs because I had almost the exact same behavior when the 2nd stick was only a 66MHz, 32MB (IBM part). Sometimes it would see the 32MB part AND the 256MB part. Most of the time only see the 256MB part. Removing and reinserting the 32MB part would then recognize it. Switching sockets also had no relief.

(As an aside I recently upgraded this 600E to use a P3 processor with 100MHz FSB, and that all works fine. But this finicky memory sizing has been with the machine since I've had it even before the processor upgrade.)

OK, sorry for the long intro, my question: maybe somebody out there knows some magic incantation to manually put into the Bios CMOS that will "relax" the over paranoia of this Bios? I'm running the latest/last INET36WW Bios and it does see the 512MB "sometimes".

I clearly need to put this 600E on the shelf, but darn, it does run Ubuntu Fiesty quite well.

[tfflivemb2]

Actually, it sounds like you might be having a hardware problem....maybe the ram slot is either dying or working itself loose from the board...

[wjcroft]

... you might be having a hardware problem....maybe the ram slot is either dying or working itself loose from the board...

I agree that it may be hardware, but it's NOT a physical socket / connector issue. Because I can also get the full 512MB of memory recognized by running the memory test program that comes with Ubuntu. That is, if on power up the screen shows 256MB, then when Grub brings up it's menu, I run memtest on the 256MB that was recognized. Powering off and powering on at that point will now find the full 512MB. So some kind of state memory in the logic involved, either on the motherboard or the memory stick -- remains until disrupted by physical disconnect or blasting with test patterns. How memtest running in only one stick can bring back the 2nd stick is still a mystery.

[u.mac]

... you might be having a hardware problem....maybe the ram slot is either dying or working itself loose from the board...

I agree that it may be hardware, but it's NOT a physical socket / connector issue.

Some (early?) 600e have issures with one ram slot (like the 600 without e/x), but I don't remember the model numbers

take a look...

http://forum.thinkpads.com/viewtopic.php?t=21529

[wjcroft]

U.Mac, thanks, I did read that. I must have the later type of system board since I'm using the INET36WW bios and my FSB is running at the full 100MHz. My P3 is reporting the correct speed of 500MHz.

My 600E is a 2645 8AU.

I wonder how people figured out the existing Bios CMOS mods to disable the onboard RAM and L2 cache?? Is there an IBM doc somewhere that lists this stuff or was it determined by disassembly? Whenever one of the sticks is not 'usable', it does indeed show up that way with the Bios F1 memory check: the total RAM _is_ there, but only half registering as usable. Which makes me strongly suspect that the Bios could be tricked into using it all, if the CMOS or Flash was modded. (No way would I want to mess with Flashing custom Bios code!)

[pkiff]

I wonder how people figured out the existing Bios CMOS mods to disable the onboard RAM and L2 cache?? Is there an IBM doc somewhere that lists this stuff or was it determined by disassembly?

There is no IBM doc that lists this stuff (or at least no doc that anyone has ever made public anywhere). The BIOS edits that disable the L2 cache were I think almost entirely figured out through trial-and-error combined with some disassembly techniques by a fellow named "Sharedoc" who hangs out over on Wims BIOS. The CMOS bits that disable/enable onboard RAM I don't know the history of, but I would guess that probably came from an IBM tech suggesting it to a customer during troubleshooting at some point. Some of the CMOS bits are actually the same ones between the 770 series and the 600 series, so that particular trick probably goes back a long time.

Phil.