RAM question
RAM question
Forgive me, I realise some of you chaps have been around longer than God's dog ... I am 3 weeks into my computer maintenance course and therefore very wet behind the ears!
Some of the current threads re RAM mention low/high density RAM sticks, can someone please explain in simple terms what this means and how one would identify such a module visually.
Muchos grassyarse.
Some of the current threads re RAM mention low/high density RAM sticks, can someone please explain in simple terms what this means and how one would identify such a module visually.
Muchos grassyarse.
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dsigma6
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For instance, a 256MB PC133 chip that is high density will have 4 chips on each side, for a total of 8. A low density stick would have 8 chips on each side, for a total of 16. This is vague, but it's as far as my high/low density knowledge goes.
Have you searched the forum or google perhaps. There's bound to be some information out there.
Have you searched the forum or google perhaps. There's bound to be some information out there.
[Current] [Dell Latitude D630] : [Past] [T43] [T40] [T23] [T20] [R40] [X22] [600E] [570] [765D]
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rkawakami
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Generally speaking, the difference between a "low-density" module and a "high-density" one has to do with the individual memory integrated circuits (i.e. chips) being used. As dsigma pointed out, a 256MB module which contains a total of 16 memory chips is deemed to be a low-density version. Using the example of a 256MB module, each one of the 16 chips in the low-density version is actually a 16Mbit dynamic RAM (16 x 16). The high-density module has 8 chips so the individual RAMs are 32Mbit versions (8 x 32). That appears to be the distinction (16Mbit vs. 32Mbit, or higher) when talking about the different memory modules.
What is not mentioned when discussing why a low-density module always works in a particular system while the same total amount of memory in a high-density module sometimes does not, is due to the difference of the refreshing specification between the two memory densities. A dynamic RAM must be constantly "refreshed" in order for the data to be retained. This is normally done by simply making sure that every row address in the memory array is accessed within a certain amount of time. Failure to do so within the specified time means that data loss can occur. When the 16Mbit memories were first designed, the typical refresh spec was around 64 milliseconds (mS). That means that each row address needed to be selected at least once every 64mS. For 16Mbit chips, that usually meant 4096 row addresses needed to be generated in that amount of time, or put another way, a new row address must be output every 15.6 (64mS/4096) microseconds (uS). When the 32Mbit memories came on-line, the refresh time spec stayed the same (64mS), however the number of rows in the memory arrray doubled to 8192. That means the 32Mbit memory needs a new row address every 7.8uS to retain data. The end result is that if the DRAM refreshing controller on the motherboard is fixed at a 15.6uS refreshing rate, the memory of the high-density module is not being refreshed correctly.
Sorry for the long explanation (that's just me), the delay in posting this (the site was not accessable for awhile) and the math....
What is not mentioned when discussing why a low-density module always works in a particular system while the same total amount of memory in a high-density module sometimes does not, is due to the difference of the refreshing specification between the two memory densities. A dynamic RAM must be constantly "refreshed" in order for the data to be retained. This is normally done by simply making sure that every row address in the memory array is accessed within a certain amount of time. Failure to do so within the specified time means that data loss can occur. When the 16Mbit memories were first designed, the typical refresh spec was around 64 milliseconds (mS). That means that each row address needed to be selected at least once every 64mS. For 16Mbit chips, that usually meant 4096 row addresses needed to be generated in that amount of time, or put another way, a new row address must be output every 15.6 (64mS/4096) microseconds (uS). When the 32Mbit memories came on-line, the refresh time spec stayed the same (64mS), however the number of rows in the memory arrray doubled to 8192. That means the 32Mbit memory needs a new row address every 7.8uS to retain data. The end result is that if the DRAM refreshing controller on the motherboard is fixed at a 15.6uS refreshing rate, the memory of the high-density module is not being refreshed correctly.
Sorry for the long explanation (that's just me), the delay in posting this (the site was not accessable for awhile) and the math....
Ray Kawakami
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rkawakami
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Best Anakin Skywalker voice: How did I do Master Obi-Wan? 
Ray Kawakami
X22 X24 X31 X41 X41T X60 X60s X61 X61s X200 X200s X300 X301 Z60m Z61t Z61p 560 560Z 600 600E 600X T21 T22 T23 T41 T60p T410 T420 T520 W500 W520 R50 A21p A22p A31 A31p
NOTE: All links to PC-Doctor software hosted by me are dead. Files removed 8/28/12 by manufacturer's demand.
X22 X24 X31 X41 X41T X60 X60s X61 X61s X200 X200s X300 X301 Z60m Z61t Z61p 560 560Z 600 600E 600X T21 T22 T23 T41 T60p T410 T420 T520 W500 W520 R50 A21p A22p A31 A31p
NOTE: All links to PC-Doctor software hosted by me are dead. Files removed 8/28/12 by manufacturer's demand.
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christopher_wolf
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rkawakami
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"The Voice of CNN": <hiss><gasp><hiss><gasp>... You don't know the power of the Dark Side! ...You remember where the power was but the power you can touch is only a memory! (<-- see, it's on topic
).
(quote attribution: http://starwars.wikia.com/wiki/Darth_Vader)
(quote attribution: http://starwars.wikia.com/wiki/Darth_Vader)
Ray Kawakami
X22 X24 X31 X41 X41T X60 X60s X61 X61s X200 X200s X300 X301 Z60m Z61t Z61p 560 560Z 600 600E 600X T21 T22 T23 T41 T60p T410 T420 T520 W500 W520 R50 A21p A22p A31 A31p
NOTE: All links to PC-Doctor software hosted by me are dead. Files removed 8/28/12 by manufacturer's demand.
X22 X24 X31 X41 X41T X60 X60s X61 X61s X200 X200s X300 X301 Z60m Z61t Z61p 560 560Z 600 600E 600X T21 T22 T23 T41 T60p T410 T420 T520 W500 W520 R50 A21p A22p A31 A31p
NOTE: All links to PC-Doctor software hosted by me are dead. Files removed 8/28/12 by manufacturer's demand.
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tfflivemb2
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“Master Obi-Wan!
Forgive this intrusion,... but I bring urgent and tragic news of several Jedi falling prey to the dark forces. Their memories have been altered by unknown neuronic elements emitted by a dark intel disguised as a banana chip. Complete neuroresonance scans reveal rapid memory decay and random neuron connections leading to behaviour not seen since ancient civilizations. I believe such beings were called “drunkards” or “gone bananas”… Master Obi-Wan, urgent action is needed to prevent contagious emissions which are corrupting…..Master Obi-Wan, forgive me once again, but why are you wearing that bright yellow gown…..and dancing…arrrg!!....where am I??....who are you???....”


Forgive this intrusion,... but I bring urgent and tragic news of several Jedi falling prey to the dark forces. Their memories have been altered by unknown neuronic elements emitted by a dark intel disguised as a banana chip. Complete neuroresonance scans reveal rapid memory decay and random neuron connections leading to behaviour not seen since ancient civilizations. I believe such beings were called “drunkards” or “gone bananas”… Master Obi-Wan, urgent action is needed to prevent contagious emissions which are corrupting…..Master Obi-Wan, forgive me once again, but why are you wearing that bright yellow gown…..and dancing…arrrg!!....where am I??....who are you???....”
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tfflivemb2
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Memory refresh cycle…. < <- see, back on topic again
>
<left brain – fast/dense memory> Ah yes. I can’t speak for my counterpart (right brain) but I’ll take that as a compliment.
<right brain – slow/low density memory> still computing (asleep actually!..) ….awaiting refresh
<left brain> Master Ray has provided an excellent discourse on the fundamentals as applied to inorganic memory but the situation with future organic memory is likely to be radically different. For a start, networked organic memory can compute at random refresh cycles and have the ability to organise information at multilevels and clustered density enabling rapid recall of disparate information for optimal decision making. However, the downside is the uncertainty in network node pathways which may be adversely influenced by exogenous stimuli.....
Ahhha!…wait!…my counterpart is about to return an answer…
<right brain> <Voice of Tweedy Pie> “I tho’ht I saw puuttykat!” “ I did! I did! I did see a puuttykat!”….
<left brain> Ah hem!…Well!…Ha!..Choke!…Cough!… No, no! You’ve got the wrong cartoon! He said Simpsons not Silvester. And his name is B1ackb1rd not Blackbird.
<outer memory – awakened by all the commotion> Ok if you force me to answer, it's approximately 42.000112! But,…. it could be 42.00011198. It’ll take me a few more refresh cycles to work out a better answer.
<middle brain> I’m sorry we seem to have a memory conflict which requires adjudication. This will require some time to resolve. In the meantime…Let’s Party!!

... this reminds me of the nerds in The Simpsons
<left brain – fast/dense memory> Ah yes. I can’t speak for my counterpart (right brain) but I’ll take that as a compliment.
<right brain – slow/low density memory> still computing (asleep actually!..) ….awaiting refresh
<left brain> Master Ray has provided an excellent discourse on the fundamentals as applied to inorganic memory but the situation with future organic memory is likely to be radically different. For a start, networked organic memory can compute at random refresh cycles and have the ability to organise information at multilevels and clustered density enabling rapid recall of disparate information for optimal decision making. However, the downside is the uncertainty in network node pathways which may be adversely influenced by exogenous stimuli.....
Ahhha!…wait!…my counterpart is about to return an answer…
<right brain> <Voice of Tweedy Pie> “I tho’ht I saw puuttykat!” “ I did! I did! I did see a puuttykat!”….
<left brain> Ah hem!…Well!…Ha!..Choke!…Cough!… No, no! You’ve got the wrong cartoon! He said Simpsons not Silvester. And his name is B1ackb1rd not Blackbird.
<outer memory – awakened by all the commotion> Ok if you force me to answer, it's approximately 42.000112! But,…. it could be 42.00011198. It’ll take me a few more refresh cycles to work out a better answer.
<middle brain> I’m sorry we seem to have a memory conflict which requires adjudication. This will require some time to resolve. In the meantime…Let’s Party!!
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rkawakami
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Somebody has WAY TOO MUCH time on their hands
!
Is that early summer sun getting to you?
Is that early summer sun getting to you?
Ray Kawakami
X22 X24 X31 X41 X41T X60 X60s X61 X61s X200 X200s X300 X301 Z60m Z61t Z61p 560 560Z 600 600E 600X T21 T22 T23 T41 T60p T410 T420 T520 W500 W520 R50 A21p A22p A31 A31p
NOTE: All links to PC-Doctor software hosted by me are dead. Files removed 8/28/12 by manufacturer's demand.
X22 X24 X31 X41 X41T X60 X60s X61 X61s X200 X200s X300 X301 Z60m Z61t Z61p 560 560Z 600 600E 600X T21 T22 T23 T41 T60p T410 T420 T520 W500 W520 R50 A21p A22p A31 A31p
NOTE: All links to PC-Doctor software hosted by me are dead. Files removed 8/28/12 by manufacturer's demand.
Lemme see now, I've got to play within the Forum rules. Ah yes, your memory is either corrupt or shortlived (ok, back on topic nowb1ackb1rd wrote:Nah, the arrival of the England Test Squad has obviously rattled himrkawakami wrote:Is that early summer sun getting to you?
I've got the design of the hat underway as well. Some liquid cooling from a few cans of Boags (the favorite local brand Ray), some shirmp on the barbie and the only rattling you'll hear will be from the stumps of the English batsmen.
Have a good one!
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