X210 WWAN /mSATA port does mPCIE!

[flyingfishfinger]

Hi-
Just wanted to inform the community of an undocumented revelation I just tried - KBL-R has "Flex-I/O" SATA + PCIE ports. OOTB, the 2nd slot is advertised as WWAN / mSATA only.

However, if the slot is connected to one of these Flex I/O ports, then it should be remappable to (m)PCIe (assuming the right additional signals are wired). Turns out, you can flip this using the Intel FIT tool - change "SATA/PCIE Combo Port 0" from SATA to PCIe in the IFD.

Bingo, 2nd mPCIE port

Cheers,
R

[mjg59]

Oh *seriously*? Things I wish I'd known a year ago. Is this entirely controlled by the FIT/FSP, or can the firmware reconfigure it?

[flyingfishfinger]

can the firmware reconfigure it?

I have no idea. There's also a 3rd option, "GPIO", it's the same way the M.2 port decides between NVME or SATA-based drives...some pin could be set. Without schematics though we'll never know if that pin goes anywhere.

Also, turns out I might have spoken too soon...while my WiFi card fully works in the slot (i.e it does actually communicate via PCIe), so far nothing else does. In particular, I tried connecting my NVME drive at x1 speeds to it (which works in the lower slot), but it doesn't show up. Also my Sunix UDP2018 USB3.1 controller doesn't work in that slot, so it's not just something particular to the drive.

Note that the PORT shows up if I insert things, but it thinks nothing is connected.

Any clues on that front? There are only so many ways I can think of to wake up a mPCIe card, and clearly the slot is *almost* wired correctly...I'm sure it's a matter of tying some pin high or low...

R

[mjg59]

Did some more digging - in theory the GPIO option is controlled using SATAXPCIE0, with the polarity option choosing whether the GPIO high/low gives mSATA/PCIe or the reverse. I'd /expect/ SATAXPCIE0 to be wired up given that it's in the same block as the other SATA wires, but obviously no guarantees there.

[flyingfishfinger]

Hmm, where would that be routed to normally? They could just tie it one way or the other ..

R

[L29Ah]

Can you share the firmware chunk to switch the port to pcie?

[L29Ah]

I ran the FIT and noticed the Combo Port 1 is also set to SATA. I wonder if it means that we can abuse the hard drive port to further extend X210 with PCIe hardware.

[L29Ah]

Can you share the firmware chunk to switch the port to pcie?

Apparently, that's the IFD change:
0x00000168 30 => 31 0x00000168
0x0000017d 10 => 11 0x0000017d
0x0000018c 70 => 71 0x0000018c

But my wifi card doesn't get detected in the top slot regardless of whether i apply this diff or use my virgin X210 firmware rebuilt with FIT. Maybe some more settings are needed?

[flyingfishfinger]

No, unfortunately you're correct that it doesn't work. If you turn on PCIE Hot Plug in the BIOS and look at a Linux boot log, you'll see that (1) a card IS detected but (2) it never exits the Link Training stage. I don't know why.

The top slot is on Controller 2, Port 7 (starting at 1), so :

1) Change PCIe Port Configuration Controller 2 (Port 5-8) to to 4x1
2) Change SATA/PCIE Combo Port Configuration Port 0 to PCIE (that is slot #7, it used to say "SATA" here).

In theory, this is enough. But I think there is something wrong with the slot electrically or by design, so the only thing I've ever gotten working here is an Azurewave AW-CE123H BT / WiFi combo card. I neither know why this card works nor why other cards don't, sadly.

I ran the FIT and noticed the Combo Port 1 is also set to SATA. I wonder if it means that we can abuse the hard drive port to further extend X210 with PCIe hardware.

In theory yes, but the problem here is that the SATA slot doesn't wire out other PCIe signals you might want (REFCLKN/P, in particular). And we don't have a schematic to see where they go, if anywhere.

R

[L29Ah]

No, unfortunately you're correct that it doesn't work. If you turn on PCIE Hot Plug in the BIOS and look at a Linux boot log, you'll see that (1) a card IS detected but (2) it never exits the Link Training stage. I don't know why.

Have you tried limiting the port to Gen1 speed?

[flyingfishfinger]

Yup. Name something, I've probably tried it. I've been poking at this on-and-off for a year, it's kind of messing with my project goals.

R

[el-sahef]

In theory yes, but the problem here is that the SATA slot doesn't wire out other PCIe signals you might want (REFCLKN/P, in particular). And we don't have a schematic to see where they go, if anywhere.

Maybe you could try getting the REFCLK signals from the neighboring PCIe-Slot? Normally each slot has its own clock lines from the clock generator but at least in the T61 it worked to use one clock pair for two PCIe slots. This was some years ago when I added the third PCIe slot on the 4:3 T61 motherboards. The solder pads for the slot were there but it was never used by Lenovo and they blocked the clock outputs to the slot via I²C configuration for the clock generator. So I took them from the PCIe slot for the WiFi card and it worked with PCIe cards in both slots.

[flyingfishfinger]

Interesting idea.

However, that doesn't really help my use case - I wanted to combine the two slots to get an x2 device. If I can't even get devices to work properly at x1 in the first slot, there's no use in taking the clock lines and making the other one into an x1 port either...

R

[L29Ah]

Interesting idea.

However, that doesn't really help my use case - I wanted to combine the two slots to get an x2 device. If I can't even get devices to work properly at x1 in the first slot, there's no use in taking the clock lines and making the other one into an x1 port either...

R

But it does help your use case. You already have two x1 data lanes and one REFCLK working.

[flyingfishfinger]

I'm not sure it does. As far as I can tell, you can only combine adjacent slots. The mapping I have so far is:

Controller 1: Port 1 - USB 3 #1, Port 2 - USB 3 #2, Port 3 - Ethernet, Port 4 - lower mPCIE
Controller 2: Port 1 - ?, Port 2 - ?, Port 3 - upper mPCIE, Port 4 - 2.5" SATA
Controller 3: 4x M.2

I was only able to combine 1&2, 3&4 for each controller so that means unless I desolder the Ethernet chip the only place I can actually access adjacent slot is Port 3 & 4 of controller 2...

R